Attempting a rewrite of my 8-bit multi-platform, multi-ISA, assembler's instruction parser. #v80 uses a static tree for mapping instructions into opcodes (2nd image) which is very fast and efficient but hairy to write.
The new approach (1st image), uses an alphabetical list of instructions with a byte to state how many chars of the previous entry are re-used since alphabetically, the left-most chars repeat the most.
There's no guarantee this will even save space (#Z80 ISA is currently 4KB, #MOS6502 is about 1.7KB) and it will likely be slower as more lines will need to be skipped vs. a char-by-char branching approach, but it may help for very large ISAs, the size of which can balloon drastically with lots of shared prefixes, something I'm worried about with adding #eZ80 support. The alternative is adding 'macro' characters for shared-prefixes, but that bloats the native code that needs to be ported between architectures.