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#chiplets

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LavX News<p>Navigating the Chiplet Revolution: Cost, Complexity, and Future Implications</p><p>As chiplets redefine semiconductor design, the tech industry grapples with their economic viability amid rising costs and complex packaging requirements. This article explores the potential of chiplet...</p><p><a href="https://news.lavx.hu/article/navigating-the-chiplet-revolution-cost-complexity-and-future-implications" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">news.lavx.hu/article/navigatin</span><span class="invisible">g-the-chiplet-revolution-cost-complexity-and-future-implications</span></a></p><p><a href="https://mastodon.cloud/tags/news" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>news</span></a> <a href="https://mastodon.cloud/tags/tech" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>tech</span></a> <a href="https://mastodon.cloud/tags/Semiconductor" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Semiconductor</span></a> <a href="https://mastodon.cloud/tags/Chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Chiplets</span></a> <a href="https://mastodon.cloud/tags/AdvancedPackaging" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AdvancedPackaging</span></a></p>
LavX News<p>The Future of 3D-IC: Transforming Semiconductor Design and Performance</p><p>The emergence of 3D-IC technology and chiplets is poised to revolutionize the semiconductor industry, enabling unprecedented performance and efficiency. However, significant challenges remain, limitin...</p><p><a href="https://news.lavx.hu/article/the-future-of-3d-ic-transforming-semiconductor-design-and-performance" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">news.lavx.hu/article/the-futur</span><span class="invisible">e-of-3d-ic-transforming-semiconductor-design-and-performance</span></a></p><p><a href="https://mastodon.cloud/tags/news" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>news</span></a> <a href="https://mastodon.cloud/tags/tech" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>tech</span></a> <a href="https://mastodon.cloud/tags/AI" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AI</span></a> <a href="https://mastodon.cloud/tags/3DIC" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>3DIC</span></a> <a href="https://mastodon.cloud/tags/Chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Chiplets</span></a></p>
John Carlsen 🇺🇸🇳🇱🇪🇺<p>Chiplet Summit in Santa Clara, CA is today and Thursday, Jan 22-23. IEEE-CNSV (IEEE Consultants' Network of Silicon Valley) will be at Booth 217 in the exhibition hall. Register for the Exhibition Floor, which is free with advance registration at <a href="https://chipletsummit.com/2025-registration-2/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">chipletsummit.com/2025-registr</span><span class="invisible">ation-2/</span></a> .</p><p>Chiplets are small, modular integrated circuits (ICs) that are combined to create larger systems. They are designed to perform specific functions, such as processing, memory, or I/O operations. </p><p><a href="https://sfba.social/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a> <a href="https://sfba.social/tags/seminconductors" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>seminconductors</span></a> <a href="https://sfba.social/tags/CNSV" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>CNSV</span></a></p>
Paul Keen<p>Chiplets are the future of chip design. Silicon Box makes it real with better yields and performance. <a href="https://ruby.social/tags/semiconductors" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>semiconductors</span></a> <a href="https://ruby.social/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a> <a href="https://ruby.social/tags/tech" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>tech</span></a> <a href="https://medium.com/@heng.huang/why-we-invested-in-silicon-box-and-advanced-chiplet-packaging-3d1905c6ec2e" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">medium.com/@heng.huang/why-we-</span><span class="invisible">invested-in-silicon-box-and-advanced-chiplet-packaging-3d1905c6ec2e</span></a></p>
Paul Houle<p>🏭 Commercial Chiplet Ecosystem May Be A Decade Away</p><p><a href="https://semiengineering.com/commercial-chiplet-ecosystem-may-be-a-decade-away/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">semiengineering.com/commercial</span><span class="invisible">-chiplet-ecosystem-may-be-a-decade-away/</span></a></p><p><a href="https://mastodon.social/tags/semiconductors" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>semiconductors</span></a> <a href="https://mastodon.social/tags/chips" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chips</span></a> <a href="https://mastodon.social/tags/microchips" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>microchips</span></a> <a href="https://mastodon.social/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a> <a href="https://mastodon.social/tags/technology" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>technology</span></a> <a href="https://mastodon.social/tags/manufacturing" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>manufacturing</span></a></p>
Paul Houle<p>🍪 What Is A Chiplet, And Why Should You Care?</p><p><a href="https://semiengineering.com/what-is-a-chiplet-and-why-should-you-care/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">semiengineering.com/what-is-a-</span><span class="invisible">chiplet-and-why-should-you-care/</span></a></p><p><a href="https://mastodon.social/tags/electronics" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>electronics</span></a> <a href="https://mastodon.social/tags/ic" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ic</span></a> <a href="https://mastodon.social/tags/technology" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>technology</span></a> <a href="https://mastodon.social/tags/engineering" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>engineering</span></a> <a href="https://mastodon.social/tags/hardware" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>hardware</span></a> <a href="https://mastodon.social/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a> <a href="https://mastodon.social/tags/semiconductors" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>semiconductors</span></a></p>
rival<p>More on this:<br><a href="https://www.technologyreview.com/2024/02/07/1087825/chinese-city-silicon-valley-chiplets/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">technologyreview.com/2024/02/0</span><span class="invisible">7/1087825/chinese-city-silicon-valley-chiplets/</span></a><br><a href="https://mastodon.social/tags/wuxi" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>wuxi</span></a> <a href="https://mastodon.social/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a> <a href="https://mastodon.social/tags/technology" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>technology</span></a> <a href="https://mastodon.social/tags/hardware" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>hardware</span></a> <a href="https://mastodon.social/tags/imperialism" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>imperialism</span></a> <a href="https://mastodon.social/tags/china" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>china</span></a></p>
katch wreck<p>`The multi-chiplet design consists of 16 <a href="https://mastodon.social/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a> containing 16 RISC-V cores each and connected to each other in a conventional symmetric <a href="https://mastodon.social/tags/multiprocessor" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>multiprocessor</span></a> (SMP) manner using a network-on-chip so that the chiplets could share memory. Each chiplet has multiple die-to-die interfaces to connect to neighbor chiplets over a 2.5D interposer and the CAS researchers say that the design is <a href="https://mastodon.social/tags/scalable" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>scalable</span></a> to 100 chiplets, or to 1,600 cores.` </p><p><a href="https://www.tomshardware.com/pc-components/cpus/china-planning-1600-core-chips-that-use-an-entire-wafer-similar-to-american-company-cerebras-wafer-scale-design" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">tomshardware.com/pc-components</span><span class="invisible">/cpus/china-planning-1600-core-chips-that-use-an-entire-wafer-similar-to-american-company-cerebras-wafer-scale-design</span></a></p>
Stephen Foskett<p><a href="https://techfieldday.net/tags/SymLink" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>SymLink</span></a>: <span class="h-card"><a href="https://techfieldday.net/@GestaltIT" class="u-url mention" rel="nofollow noopener noreferrer" target="_blank">@<span>GestaltIT</span></a></span> <span class="h-card"><a href="https://techfieldday.net/@sfoskett" class="u-url mention" rel="nofollow noopener noreferrer" target="_blank">@<span>sfoskett</span></a></span> <a href="https://techfieldday.net/tags/Chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Chiplets</span></a> <a href="https://techfieldday.net/tags/FMS2023" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FMS2023</span></a> <a href="https://techfieldday.net/tags/TechTalk" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>TechTalk</span></a> <a href="https://techfieldday.net/tags/UCIe" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>UCIe</span></a><br><a href="https://gestaltit.com/tech-talk/stephen/standardization-and-integration-of-chiplets-using-ucie-with-brian-rea/" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">gestaltit.com/tech-talk/stephe</span><span class="invisible">n/standardization-and-integration-of-chiplets-using-ucie-with-brian-rea/</span></a></p>
Jess (short for Jessica)<p>First production wafer of <a href="https://fosstodon.org/tags/chiplets" class="mention hashtag" rel="tag">#<span>chiplets</span></a> I&#39;ve been working on for the past year just dropped @ work, now I&#39;ve got that out-of-office auto-reply up, and it&#39;s vacay time!<br /><a href="https://fosstodon.org/tags/chips" class="mention hashtag" rel="tag">#<span>chips</span></a> <a href="https://fosstodon.org/tags/friyay" class="mention hashtag" rel="tag">#<span>friyay</span></a> <a href="https://fosstodon.org/tags/outofoffice" class="mention hashtag" rel="tag">#<span>outofoffice</span></a></p>
RISC-V<p>RT from Flo (@FlorianWoh)</p><p>Amazing to listen to Balaji of @VentanaMicro and his Chiplets, giving everyone high end RISC-V cores, ready to use and differentiate with leading edge SoCs</p><p><a href="https://noc.social/tags/riscvsummitbarcelona" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>riscvsummitbarcelona</span></a> <a href="https://noc.social/tags/riscveverywhere" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>riscveverywhere</span></a> <a href="https://noc.social/tags/semiconductor" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>semiconductor</span></a> <a href="https://noc.social/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a></p><p>Original tweet : <a href="https://twitter.com/FlorianWoh/status/1665999678440079360" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">twitter.com/FlorianWoh/status/</span><span class="invisible">1665999678440079360</span></a></p>
Florian - RISC-V Ambassador<p>An interesting design from Swiss ETH Zürich and Italy University of Bologna, a RISC-V chiplet design with 216 cores per chiplet and HBM2 memory</p><p><a href="https://www.tomshardware.com/news/432-core-occamy-cpu-for-use-in-space-tapes-out" target="_blank" rel="nofollow noopener noreferrer" translate="no"><span class="invisible">https://www.</span><span class="ellipsis">tomshardware.com/news/432-core</span><span class="invisible">-occamy-cpu-for-use-in-space-tapes-out</span></a></p><p><a href="https://fosstodon.org/tags/RISCV" class="mention hashtag" rel="tag">#<span>RISCV</span></a> <a href="https://fosstodon.org/tags/CHIPLETS" class="mention hashtag" rel="tag">#<span>CHIPLETS</span></a></p>
RISC-V<p>RT from Semiconductor Engineering (@SemiEngineering)</p><p>10 technical papers added this week <a href="https://semiengineering.com/chip-industrys-technical-paper-roundup-dec-20/" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">semiengineering.com/chip-indus</span><span class="invisible">trys-technical-paper-roundup-dec-20/</span></a><br><a href="https://noc.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>RISCV</span></a> <a href="https://noc.social/tags/semiconductor" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>semiconductor</span></a> <a href="https://noc.social/tags/lowpower" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>lowpower</span></a> <a href="https://noc.social/tags/HardwareSecurity" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>HardwareSecurity</span></a> <a href="https://noc.social/tags/SRAM" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>SRAM</span></a> <a href="https://noc.social/tags/graphene" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>graphene</span></a> <a href="https://noc.social/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a><br>@UTAustin @ucsbcs @aalto @AuburnU @FLEETCentre @UMich @ethzurich @ETH_en<br><a href="https://noc.social/tags/5G" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>5G</span></a> <a href="https://noc.social/tags/fuzzing" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fuzzing</span></a> <a href="https://noc.social/tags/semiEDA" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>semiEDA</span></a></p><p>Original tweet : <a href="https://twitter.com/SemiEngineering/status/1605238496696094720" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">twitter.com/SemiEngineering/st</span><span class="invisible">atus/1605238496696094720</span></a></p>
RISC-V<p>You're invited! Join us at the RISC-V Summit Tues., Dec. 13 to hear Ventana’s Balaji Baktha speak on how RISC-V is transforming the next generation data center architectures: <a href="https://hubs.la/Q01s2SS70" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="">hubs.la/Q01s2SS70</span><span class="invisible"></span></a> Register today at <a href="https://hubs.la/Q01s2Nfj0" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="">hubs.la/Q01s2Nfj0</span><span class="invisible"></span></a><br><a href="https://noc.social/tags/RISCV" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>RISCV</span></a> <a href="https://noc.social/tags/OpenSource" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>OpenSource</span></a> <a href="https://noc.social/tags/Chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Chiplets</span></a></p><p>Original tweet : <a href="https://twitter.com/risc_v/status/1591143729124978689" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">twitter.com/risc_v/status/1591</span><span class="invisible">143729124978689</span></a></p>
CK's Technology News<p><a href="https://mastodon.social/tags/AMD" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AMD</span></a> commercialized <a href="https://mastodon.social/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a> to beat <a href="https://mastodon.social/tags/Intel" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Intel</span></a> </p><p><a href="https://www.protocol.com/enterprise/amd-intel-chiplets-moores-law" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">protocol.com/enterprise/amd-in</span><span class="invisible">tel-chiplets-moores-law</span></a></p>
heise online (inoffiziell)Um Chiplets unterschiedlicher Hersteller zu einem Prozessor oder Rechenbeschleuniger zu koppeln, dient die mit PCI Express (PCIe) verwandte Schnittstelle UCIe. <br><a href="https://www.heise.de/news/Standard-Schnittstelle-UCIe-fuer-Chiplet-Mischungen-6535218.html" rel="nofollow noopener noreferrer" target="_blank">Prozessorbaukasten: Standard-Schnittstelle UCIe für Chiplet-Mischungen</a><br>
IT News<p>Intel, AMD, and other industry heavyweights create a new standard for chiplets - Enlarge / A sample chiplet design, with the CPU dies made with a more a... - <a href="https://arstechnica.com/?p=1837604" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="">arstechnica.com/?p=1837604</span><span class="invisible"></span></a> <a href="https://schleuss.online/tags/chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>chiplets</span></a> <a href="https://schleuss.online/tags/qualcomm" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>qualcomm</span></a> <a href="https://schleuss.online/tags/samsung" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>samsung</span></a> <a href="https://schleuss.online/tags/intel" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>intel</span></a> <a href="https://schleuss.online/tags/tech" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>tech</span></a> <a href="https://schleuss.online/tags/tsmc" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>tsmc</span></a> <a href="https://schleuss.online/tags/ucie" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ucie</span></a> <a href="https://schleuss.online/tags/amd" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>amd</span></a></p>
CK's Technology News<p>The Motivation for <a href="https://mastodon.social/tags/Chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Chiplets</span></a> and Their Adoption in <a href="https://mastodon.social/tags/AMD" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>AMD</span></a> Processors </p><p><a href="https://www.youtube.com/watch?v=97gPMIbYSNI" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">youtube.com/watch?v=97gPMIbYSN</span><span class="invisible">I</span></a></p>
heise online (inoffiziell)heise+ | Hintergrund: Packaging-Techniken für Chips und Chiplets<br><br>Statt monolithischer Chips werden Hochleistungs-CPUs schon heute aus mehreren Chiplets zusammengesetzt. Künftig wird das zum Standard werden – ein Überblick. <br><a href="https://www.heise.de/hintergrund/Hintergrund-Packaging-Techniken-fuer-Chips-und-Chiplets-6192551.html" rel="nofollow noopener noreferrer" target="_blank">Hintergrund: Packaging-Techniken für Chips und Chiplets</a><br>
CK's Technology News<p><a href="https://mastodon.social/tags/Intel" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Intel</span></a> Brings <a href="https://mastodon.social/tags/Chiplets" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Chiplets</span></a> to Data Center <a href="https://mastodon.social/tags/CPUs" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>CPUs</span></a> </p><p>Info Article:<br><a href="https://www.eetimes.com/intel-brings-chiplets-to-data-center-cpus/" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://www.</span><span class="ellipsis">eetimes.com/intel-brings-chipl</span><span class="invisible">ets-to-data-center-cpus/</span></a></p>