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Hans<p>Nice! nextpnr-xilinx in the <a href="https://fosstodon.org/tags/openxc7" class="mention hashtag" rel="tag">#<span>openxc7</span></a> <a href="https://fosstodon.org/tags/opensource" class="mention hashtag" rel="tag">#<span>opensource</span></a> <a href="https://fosstodon.org/tags/FPGA" class="mention hashtag" rel="tag">#<span>FPGA</span></a> toolchain now can place and route a <a href="https://fosstodon.org/tags/LiTeX" class="mention hashtag" rel="tag">#<span>LiTeX</span></a> GTX transceiver test design.</p>
Bo Morgan<p>I started a project page to document my first FPGA project on a long while, mainly so that I don't forget, but could possibly be useful to others... I'll plan to add subsequent projects and make more progress on this one in the next few weeks and months.</p><p>"I bought myself a Radiona ULX3S from CrowdSupply, which includes the 85k Lattice ECP5 FPGA, which can be programmed to simulate the open source 32-bit RISC-V CPU with a completely open source LiteX-yosys-nextpnr, toolchain."</p><p><a href="https://blog.bomorgan.io/hobbies/hardware/fpgas/litex-riscv-ecp5-ulx3s/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">blog.bomorgan.io/hobbies/hardw</span><span class="invisible">are/fpgas/litex-riscv-ecp5-ulx3s/</span></a></p><p><a href="https://kolektiva.social/tags/riscv" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>riscv</span></a> <a href="https://kolektiva.social/tags/foss" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>foss</span></a> <a href="https://kolektiva.social/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> <a href="https://kolektiva.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> <a href="https://kolektiva.social/tags/yosys" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>yosys</span></a> <a href="https://kolektiva.social/tags/nextpnr" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>nextpnr</span></a> <a href="https://kolektiva.social/tags/linux" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>linux</span></a> <a href="https://kolektiva.social/tags/crowdsupply" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>crowdsupply</span></a> <a href="https://kolektiva.social/tags/radiona" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>radiona</span></a> <a href="https://kolektiva.social/tags/ulx3s" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ulx3s</span></a> <a href="https://kolektiva.social/tags/lattice" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>lattice</span></a> <a href="https://kolektiva.social/tags/ecp5" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ecp5</span></a></p>
Bo Morgan<p>Just got a 32-bit RISC-V SoC programmed into the Lattice ECP5 FPGA on Radiona's ULX3S using the completely open source LiteX toolchain, including yosys and nextpnr.</p><p><a href="https://kolektiva.social/tags/fosh" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fosh</span></a> <a href="https://kolektiva.social/tags/foss" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>foss</span></a> <a href="https://kolektiva.social/tags/oshw" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>oshw</span></a> <a href="https://kolektiva.social/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> <a href="https://kolektiva.social/tags/riscv" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>riscv</span></a> <a href="https://kolektiva.social/tags/linux" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>linux</span></a> <a href="https://kolektiva.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> <a href="https://kolektiva.social/tags/yosys" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>yosys</span></a> <a href="https://kolektiva.social/tags/nextpnr" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>nextpnr</span></a></p>
ponymorphism (Nikki) 🏳️‍⚧️🏳️‍🌈<p><span class="h-card" translate="no"><a href="https://oldbytes.space/@haitchfive" class="u-url mention" rel="nofollow noopener noreferrer" target="_blank">@<span>haitchfive</span></a></span> <br>Neither of them come with any linux running on them.</p><p>While I wouldn't rule out that it may be possible to get linux to run on the ESP32-P4 (like <a href="https://hackaday.com/2021/07/21/its-linux-but-on-an-esp32/" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">hackaday.com/2021/07/21/its-li</span><span class="invisible">nux-but-on-an-esp32/</span></a> ) it is usually used with a realtime OS like e.g. <a href="https://chaos.social/tags/freertos" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>freertos</span></a> , <a href="https://chaos.social/tags/ZephyRTOS" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ZephyRTOS</span></a> or <a href="https://chaos.social/tags/embassy" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>embassy</span></a></p><p>The FPGA does not contain any CPU/MCU or SoC initially, but it absolutely is possible to get linux to run on it, for example using <a href="https://chaos.social/tags/LiteX" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>LiteX</span></a> (for example <a href="https://github.com/litex-hub/linux-on-litex-vexriscv" rel="nofollow noopener noreferrer" translate="no" target="_blank"><span class="invisible">https://</span><span class="ellipsis">github.com/litex-hub/linux-on-</span><span class="invisible">litex-vexriscv</span></a> ) </p><p>Fun stuff 😊</p>
Goran_Mahovlic<p>Partially assembled <a href="https://mastodon.online/tags/ULX4M" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ULX4M</span></a> <a href="https://mastodon.online/tags/PCIe" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>PCIe</span></a> baseboard. With onboard resistor jumpers I can set 1x PCIe + 2xSTP or 4x PCIe. I can now check simple stuff, but for PCIe I will need to use <a href="https://mastodon.online/tags/Litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>Litex</span></a></p>
Jevin Sweval<p><span class="h-card" translate="no"><a href="https://mastodon.social/@whitequark" class="u-url mention" rel="nofollow noopener noreferrer" target="_blank">@<span>whitequark</span></a></span> maybe <span class="h-card" translate="no"><a href="https://fosstodon.org/@aleksorsist" class="u-url mention" rel="nofollow noopener noreferrer" target="_blank">@<span>aleksorsist</span></a></span> could use some help with ThunderScope? The ThunderScope folks are <a href="https://mastodon.social/tags/LiteX" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>LiteX</span></a> heretics though. :P I probably shouldn’t cast stones since I’m in a LiteX/Amaranth mixed-mode purgatory.</p>
Xilokar<p>Finally managed to do what I expected to do with my litefury board (and <a href="https://mamot.fr/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> env) 😜</p>
Xilokar<p><span class="h-card" translate="no"><a href="https://mastodon.social/@jevinskie" class="u-url mention" rel="nofollow noopener noreferrer" target="_blank">@<span>jevinskie</span></a></span> <br>RLE support ? Nice !</p><p>All this <a href="https://mamot.fr/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> ecosystem looks very powerfull !</p><p>I am just trying to learn the basis, and the scope is a very nice tool to understand what's going on.</p><p>The only drawback of all this fpga stuff is the "compilation" time 😅 (at least on my setup here)</p>
Xilokar<p>On my journey through <a href="https://mamot.fr/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> and fpga programming I've just discovered litescope...<br>Whoa 😍</p>
Xilokar<p>While <a href="https://mamot.fr/tags/LiteX" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>LiteX</span></a> is easy to setup, there is a gap before being able to do things on your own...</p><p>I was just trying to build a simple memory to memory dma, but I think I am missing some parts of the whole stuff</p><p>If anyone has link to good tutorials, it'd be much appreciated 😁</p>
Hans<p>The Alientek DaVinci Pro <a href="https://fosstodon.org/tags/FPGA" class="mention hashtag" rel="tag">#<span>FPGA</span></a> board now has<br /> <a href="https://fosstodon.org/tags/LiTeX" class="mention hashtag" rel="tag">#<span>LiTeX</span></a> support!<br /><a href="https://github.com/litex-hub/litex-boards/pull/582" target="_blank" rel="nofollow noopener noreferrer" translate="no"><span class="invisible">https://</span><span class="ellipsis">github.com/litex-hub/litex-boa</span><span class="invisible">rds/pull/582</span></a></p>
Hans<p>Wrote up a bunch of automation scripts to set up a <a href="https://fosstodon.org/tags/Vivado" class="mention hashtag" rel="tag">#<span>Vivado</span></a> AMS instance and automated build of cores. Due to the genius of @enjoy_digital <a href="https://fosstodon.org/tags/LiTeX" class="mention hashtag" rel="tag">#<span>LiTeX</span></a> tech, all working cores were built for a different FPGA (K325T 3x MiSTer) in a day (5h build time, $5 AWS).</p><p><a href="https://youtu.be/hXLaA0ITzy8" target="_blank" rel="nofollow noopener noreferrer" translate="no"><span class="invisible">https://</span><span class="">youtu.be/hXLaA0ITzy8</span><span class="invisible"></span></a></p>
Bjonnh<p>Playing with <a href="https://mastodon.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> <a href="https://mastodon.social/tags/litescope" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litescope</span></a> FPGA logic analyzer. That stuff works super well. What the <a href="https://mastodon.social/tags/FOSS" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>FOSS</span></a> <a href="https://mastodon.social/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> people (<a href="https://mastodon.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> <a href="https://mastodon.social/tags/migen" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>migen</span></a> <a href="https://mastodon.social/tags/oss" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>oss</span></a>-cad <a href="https://mastodon.social/tags/yosys" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>yosys</span></a> <a href="https://mastodon.social/tags/openocd" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>openocd</span></a> and all the others hidden in the toolchain) have done is amazing. The board is a colorlight 5a-75b with an ECP5.<br><a href="https://kraut.zone/w/k2qy5PXbBuHhozcDf9QgbP" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">kraut.zone/w/k2qy5PXbBuHhozcDf</span><span class="invisible">9QgbP</span></a></p><p>Code: <a href="https://github.com/bjonnh/alscope" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="">github.com/bjonnh/alscope</span><span class="invisible"></span></a></p>
Brian Swetland<p>Should anyone have any use for an Ethernet PHY PMOD, I've pushed my design files and related materials along with a readme, under a permissive open hardware license to a github repository. Enjoy!<br><a href="https://github.com/swetland/ethernet-pmod" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">github.com/swetland/ethernet-p</span><span class="invisible">mod</span></a><br><a href="https://chaos.social/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> <a href="https://chaos.social/tags/pmod" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>pmod</span></a> <a href="https://chaos.social/tags/oshw" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>oshw</span></a> <a href="https://chaos.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a></p>
Brian Swetland<p>Network booting a Litex VexRiscv SoC target over IPv6 link local transport -- rendezvous by multicast, no need for special privileges, tftp servers or other nonsense. Whee!<br><a href="https://chaos.social/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> <a href="https://chaos.social/tags/osdev" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>osdev</span></a> <a href="https://chaos.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> <a href="https://chaos.social/tags/ipv6" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>ipv6</span></a></p>
Brian Swetland<p>Got my Qemu Litex support to a usable point (ULX3s shaped machine with 32MB ram, 640x480x32 framebuffer, uart, timer, and interrupt controller all working). Identical code is happily running on Qemu, the ULX3S and the IceSugarPro FPGA boards.<br><a href="https://github.com/swetland/qemu/commits/litex" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">github.com/swetland/qemu/commi</span><span class="invisible">ts/litex</span></a><br><a href="https://chaos.social/tags/osdev" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>osdev</span></a> <a href="https://chaos.social/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> <a href="https://chaos.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> <a href="https://chaos.social/tags/qemu" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>qemu</span></a></p>
Brian Swetland<p>Updated my extremely minimalist serial console to speak the litex serialboot protocol so I don't need to drag a whole mess of python around just to shoot binaries down to an FPGA:<br><a href="https://github.com/swetland/sconsole" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="">github.com/swetland/sconsole</span><span class="invisible"></span></a><br><a href="https://chaos.social/tags/fpga" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>fpga</span></a> <a href="https://chaos.social/tags/osdev" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>osdev</span></a> <a href="https://chaos.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a></p>
Brian Swetland<p><span class="h-card"><a href="https://chaos.social/@tommythorn" class="u-url mention" rel="nofollow noopener noreferrer" target="_blank">@<span>tommythorn</span></a></span> You might try the <a href="https://chaos.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> channel on irc.libera.chat, I've received some helpful answers there. Also the FPGA and related channels on the 1bitsquared discord can be useful resources: <a href="https://1bitsquared.com/pages/chat" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="">1bitsquared.com/pages/chat</span><span class="invisible"></span></a></p>
Brian Swetland<p>My first attempt at a <a href="https://chaos.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> peripheral (mutating VideoTerminal into VideoTextGrid)...</p><p><a href="https://github.com/enjoy-digital/litex/pull/1286" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">github.com/enjoy-digital/litex</span><span class="invisible">/pull/1286</span></a><br><a href="https://github.com/litex-hub/litex-boards/pull/386" rel="nofollow noopener noreferrer" target="_blank"><span class="invisible">https://</span><span class="ellipsis">github.com/litex-hub/litex-boa</span><span class="invisible">rds/pull/386</span></a></p>
Brian Swetland<p>Learning some Migen and rearranging the LItex Video Terminal to allow software to write arbitrary character cells instead of just fill from a UART stream. Next, perhaps scrolling controls and a register to write into the font pattern "rom"...</p><p>Thank you, tnt and _florent_ on <a href="https://chaos.social/tags/litex" class="mention hashtag" rel="nofollow noopener noreferrer" target="_blank">#<span>litex</span></a> irc for answering my many questions.</p>